Engineering resource

PLC controller PCBA: isolation and test access

A PLC controller PCBA can pass a power-on check while still having an untested field-input channel, an ambiguous isolation boundary, or a programming connector that becomes inaccessible after assembly. Resolve these issues before releasing the board. The manufacturing package should show which electrical domains must remain separate, where measurements are permitted, and what evidence constitutes a passing unit.

This guide focuses on a controller with industrial digital inputs and a separate logic domain. Analog inputs, communication ports and output drivers need their own extensions to the test plan. Start with the broader industrial control assembly requirements when defining the operating environment and enclosure.

Draw the isolation boundary before specifying test points

Mark the logic supply and return, each field-side supply and return, chassis or protective-earth connections, and every component that crosses between domains. Include isolated power converters as well as signal isolators. A signal path with an isolation component does not establish an isolated system if another connection joins the two returns.

Distinguish group isolation from channel-to-channel isolation. With group isolation, several inputs may share a field reference while remaining separate from the controller. Channel-to-channel isolation addresses separation between individual input circuits. The required arrangement depends on the connected sensors and installation; the word “isolated” alone is not an adequate purchasing requirement.

TI’s SLLA370D application brief, revised June 2025, describes isolated digital-input receivers that integrate input conditioning and current limiting. It also identifies differences between channel-independent and multichannel implementations. Use the selected device’s data sheet to set the circuit values and operating conditions; an integrated receiver does not remove the need to document the complete board boundary.

Turn isolation requirements into controlled assembly details

Do not select a board spacing from the headline withstand-voltage rating of an isolator. Creepage follows an insulating surface; clearance is the shortest distance through air. Their required values depend on the applicable equipment requirements and conditions such as voltage, material classification and environment. TI’s creepage and clearance training explains why package and application conditions matter. The responsible design engineer should approve the actual distances and insulation requirements.

Carry those decisions into fabrication and assembly drawings. Identify copper keepouts, slots, permitted component bodies and any restrictions on solder, wire links or repair near the boundary. A CAD boundary annotation that is absent from the released manufacturing files cannot guide an assembly inspection. Review alternate components by exact package and isolation characteristics, not simply by pin count and logic function.

Specify cleaning and coating deliberately. If coating is required, state its approved material and process, masked areas, inspection requirements and test sequence. Do not assume that adding coating automatically permits a smaller spacing. Test pads that must remain accessible after coating need an explicit masking instruction, or the production route must complete the relevant tests first.

Build a test-access map that the fixture designer can use

Give each access point a net name, reference domain, board side, coordinates and intended measurement. Agree pad geometry, finish, probe clearance and board support with the fixture provider. There is no single pad size that suits every probe system and assembly. Connector housings, tall parts and enclosure features must be considered in the mechanical model.

Example PLC test-access planning map
Area Access to provide Acceptance information to release
Input power Supply entry and its return; protected rail where relevant Permitted supply range, current limit and startup sequence
Isolated power Each secondary rail with its own reference return Loaded voltage limits, load condition and settling time
Digital inputs Every field terminal and corresponding logic readback Input states, transition limits, filtering configuration and channel map
Programming Programming interface, reset and voltage reference Firmware identifier, verification method and released security settings
Diagnostics Fault indication and readable status registers Supported simulated faults and expected reporting behavior
Insulation boundary Defined test connections that preserve domain separation Engineer-approved test method and limits, where required

The map must include the fixture’s connections, not just the PCB nets. Review whether a debugger, USB cable, oscilloscope ground or shared instrument return unintentionally joins isolated domains. Use appropriately rated measurement arrangements and a documented connection sequence. An accessible pad is useful only when the intended measurement can be made without defeating the design boundary.

Test each input path, not just its indicator LED

Define the intended input type, sensor wiring, ON/OFF conditions and filtering behavior. Then test the complete path from the external terminal to the value read by the controller. An LED can confirm activity at one point while the serialized channel assignment or firmware interpretation is wrong.

TI’s TIDU196A digital-input reference design separates supply measurements from field-input tests. Its functional procedure varies the input level to measure switching behavior and checks isolated and nonisolated rails. This is a useful structure for a test specification, rather than a source of universal pass limits for a different board.

For an illustrative eight-input production procedure, begin with all channels inactive, activate one channel at a time, and verify the corresponding reported bit. Repeat with complementary patterns to help reveal swapped channels or unintended coupling. Check all-active operation where it is part of the approved test scope. Record the actual firmware and filter settings: changing a debounce setting can change the response seen by the fixture without changing the soldering.

Set analog sweep limits, dwell times and measurement tolerances from the released circuit and its verification results. If tests only apply nominal ON and OFF levels, state that limitation. Such a test does not characterize every transition threshold across the full temperature range.

Give diagnostics and outputs explicit test coverage

For devices with diagnostic registers, list which conditions are implemented and observable in the finished product. Analog Devices’ MAXREFDES1165 industrial I/O reference design documents input wire-break detection, fault reporting and isolated control signals. It demonstrates why the data path and fault path both need attention. Its configuration and measured performance belong to that reference hardware, not automatically to another PLC board.

Translate available diagnostics into repeatable fixture actions. For example, distinguish a deliberately disconnected sensor simulation from an ordinary OFF-state stimulus if the circuit supports that distinction. Specify how a fault is reported, cleared and logged. Output channels additionally need defined loads and checks of actual output behavior; a successful register write alone does not verify the load path.

Separate routine production checks from design qualification

Inspection, continuity checks, firmware programming and functional I/O testing answer different questions. EMC evaluation and insulation verification also have distinct procedures and equipment. Do not describe a unit as having passed surge, electrical-fast-transient or dielectric testing when the production record only contains a power-on result.

Agree the assembly testing options and coverage before quoting the build. Where an insulation test is required, the product engineer must release its connections, limits, duration and handling procedure, including whether it is a design-validation or routine-production activity. Do not copy a component qualification voltage into a completed-board test instruction.

Release one package for the board, firmware and fixture

Before ordering, use the release-file readiness checklist and add these PLC-specific deliverables:

  • A marked isolation-domain drawing and approved spacing requirements.
  • A controlled BOM with exact isolator, transformer and protection-device variants.
  • A test-point and connector map aligned with the PCB and assembly revision.
  • Firmware, configuration and programming verification instructions.
  • A test sequence containing stimuli, loads, limits and expected fault behavior.
  • Per-unit records linking serial number, board revision, firmware and test result.
  • Defined repair approval and retest steps, including checks affected by rework near the isolation boundary.

Identify who owns fixture development and who approves the first article. Resolve missing test access while layout changes are still possible. When the release package is ready, request a project review with the board revision, quantity and required test scope. This allows fabrication, sourcing, assembly and verification to be quoted against the same requirements.

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