Introduction to Impedance Routing

Impedance routing is a critical aspect of PCB design, especially in high-speed digital and RF circuits. Proper impedance control ensures signal integrity, minimizes reflections, and reduces electromagnetic interference (EMI). In this article, we will dive deep into the process of configuring layer stack controlled impedance routing, covering the fundamentals, best practices, and practical examples.

What is Impedance?

Impedance is the measure of opposition to the flow of alternating current (AC) in a circuit. It is composed of two components: resistance and reactance. Resistance is the opposition to the flow of current, while reactance is the opposition to the change in current due to capacitance and inductance.

Why is Impedance Control Important?

Impedance control is crucial for several reasons:

1. Signal Integrity: Proper impedance matching ensures that the signal travels from the source to the destination with minimal reflections and distortions.
2. EMI Reduction: Controlled impedance routing helps minimize electromagnetic emissions, reducing the risk of interference with other devices.
3. Power Efficiency: Impedance matching minimizes power loss due to reflections, improving overall power efficiency.

Understanding the Layer Stack

The layer stack is the arrangement of copper layers and dielectric materials that make up a PCB. It plays a significant role in impedance control, as the thickness and properties of each layer affect the impedance of the traces routed on them.

Layer Stack Components

A typical layer stack consists of the following components:

1. Copper Layers: These are the conductive layers where traces and planes are routed.
2. Dielectric Materials: These are the insulating materials that separate the copper layers, such as FR-4, Rogers, or Isola.
3. Solder Mask: This is the protective coating applied to the outer layers of the PCB to prevent oxidation and facilitate soldering.
4. Silkscreen: This is the text and graphics printed on the PCB for identification and assembly purposes.

Layer Stack Configuration

The configuration of the layer stack depends on the specific requirements of the circuit, such as the number of signals, power distribution, and impedance targets. A typical 4-layer PCB stack-up might look like this:

Layer	Material	Thickness (mil)
Top Copper	Copper	1.4
Dielectric 1	FR-4	6.7
Inner Layer 1	Copper	1.4
Dielectric 2	FR-4	47.2
Inner Layer 2	Copper	1.4
Dielectric 3	FR-4	6.7
Bottom Copper	Copper	1.4

Calculating Impedance

To achieve controlled impedance routing, we need to calculate the target impedance for each trace. The two most common types of impedance are:

1. Characteristic Impedance (Z0): This is the impedance of a trace with respect to the reference plane.
2. Differential Impedance (Zdiff): This is the impedance between two traces in a differential pair.

Characteristic Impedance

The characteristic impedance of a trace depends on its width, thickness, and the properties of the surrounding dielectric material. It can be calculated using the following formula:

Z0 = (87 / √ε_r) * ln(5.98 * h / (0.8 * w + t))

Where:
– ε_r: Relative permittivity (dielectric constant) of the substrate material
– h: Height of the substrate between the trace and the reference plane
– w: Width of the trace
– t: Thickness of the trace

Differential Impedance

Differential impedance is calculated using the following formula:

Zdiff = 2 * Z0 * (1 – 0.48 * e^(-0.96 * s/h))

Where:
– Z0: Characteristic impedance of a single trace
– s: Spacing between the traces in the differential pair
– h: Height of the substrate between the traces and the reference plane

Impedance Control Techniques

There are several techniques to achieve controlled impedance routing, including:

1. Trace Width and Spacing: Adjusting the width and spacing of traces to match the target impedance.
2. Dielectric Thickness: Varying the thickness of the dielectric layers to control impedance.
3. Dielectric Material: Choosing dielectric materials with specific properties to achieve the desired impedance.
4. Reference Planes: Using uninterrupted reference planes (ground or power) to maintain a consistent impedance along the trace.

Trace Width and Spacing

The width and spacing of traces have a significant impact on impedance. Wider traces have lower impedance, while narrower traces have higher impedance. The spacing between traces in a differential pair also affects the differential impedance.

To achieve the target impedance, designers can adjust the trace width and spacing using the formulas mentioned earlier. PCB design software often includes impedance calculators that simplify this process.

Dielectric Thickness

The thickness of the dielectric layer between the trace and the reference plane directly affects the impedance. Thicker dielectrics result in higher impedance, while thinner dielectrics lead to lower impedance.

Designers can work with the PCB manufacturer to specify the required dielectric thicknesses for each layer in the stack-up. It’s essential to consider the manufacturing capabilities and tolerances when selecting dielectric thicknesses.

Dielectric Material

The choice of dielectric material also influences impedance. Different materials have varying dielectric constants (ε_r), which affect the impedance calculation.

Common dielectric materials include:

• FR-4: A widely used, cost-effective material with a dielectric constant of approximately 4.5.
• Rogers: High-performance materials with lower dielectric constants and better thermal stability, often used in RF applications.
• Isola: A range of materials with varying properties, suitable for different applications and impedance requirements.

Reference Planes

Maintaining a continuous reference plane (ground or power) beneath the signal traces is crucial for consistent impedance. Any gaps or discontinuities in the reference plane can cause impedance variations and signal integrity issues.

Designers should ensure that the reference planes are uninterrupted and closely coupled to the signal traces. In some cases, stitching vias may be used to connect reference planes on different layers, maintaining a low-impedance path for the return current.

Routing Guidelines

When routing traces for controlled impedance, consider the following guidelines:

1. Route traces perpendicular to the board edge to minimize reflections.
2. Avoid sharp bends or corners, as they can cause impedance discontinuities. Use rounded corners or 45-degree angles instead.
3. Maintain a consistent trace width and spacing throughout the route to avoid impedance variations.
4. Keep traces away from the board edge to reduce EMI and impedance changes due to the edge effect.
5. Use stitching vias to connect reference planes on different layers, ensuring a low-impedance return path.

Simulation and Verification

Before finalizing the PCB design, it’s essential to simulate and verify the impedance of critical traces. Many PCB design tools include built-in impedance simulation features that allow designers to check the impedance profile along the trace length.

Simulation helps identify potential issues, such as impedance mismatches or discontinuities, allowing designers to make necessary adjustments before sending the design for manufacturing.

After fabrication, the PCB should undergo impedance testing to verify that the actual impedance values match the target values. This testing is typically performed by the PCB manufacturer using a time-domain reflectometer (TDR) or a vector network analyzer (VNA).

FAQ

1. What is the difference between characteristic impedance and differential impedance?

Characteristic impedance (Z0) is the impedance of a single trace with respect to the reference plane, while differential impedance (Zdiff) is the impedance between two traces in a differential pair.

2. How does the dielectric constant affect impedance?

The dielectric constant (ε_r) of the substrate material directly affects the impedance. A higher dielectric constant results in lower impedance, while a lower dielectric constant leads to higher impedance.

3. What is the purpose of reference planes in controlled impedance routing?

Reference planes (ground or power) provide a low-impedance return path for the signal current. They help maintain a consistent impedance along the trace length and minimize EMI.

4. Why is impedance matching important in PCB design?

Impedance matching ensures that the signal travels from the source to the destination with minimal reflections and distortions. It helps maintain signal integrity, reduces EMI, and improves power efficiency.

5. How can I verify the impedance of my PCB design?

You can verify the impedance of your PCB design through simulation using built-in tools in PCB design software. After fabrication, the PCB manufacturer can perform impedance testing using a TDR or VNA to ensure that the actual impedance values match the target values.

Conclusion

Configuring layer stack controlled impedance routing is a critical aspect of PCB design, especially for high-speed digital and RF circuits. By understanding the fundamentals of impedance, layer stack configuration, and impedance control techniques, designers can create PCBs with excellent signal integrity and minimal EMI.

Following best practices, such as adjusting trace width and spacing, selecting appropriate dielectric materials, and maintaining continuous reference planes, helps achieve the target impedance values. Simulation and verification are essential steps in ensuring that the design meets the impedance requirements before and after fabrication.

By mastering the art of impedance routing, PCB designers can create robust, high-performance circuits that operate reliably in demanding applications.